In semiconductor fabrication processes, the resolution of a photoresist pattern begins to blur at about 45 nanometer (nm) half pitch. To continue to use fabrication equipment purchased for larger technology nodes, double exposure methods have been developed.
Double exposure involves forming patterns on a single layer of a substrate using two different masks in succession. As a result, a minimum line spacing in the combined pattern can be reduced while maintaining good resolution. In a method referred to as double dipole lithography (DDL), the patterns to be formed on the layer are decomposed and formed on a first mask having only horizontal lines, and on a second mask having only vertical lines. The first and second masks are said to have 1-dimensional (1-D) patterns, which can be printed with existing lithographic tools.
Another form of double exposure is referred to as double patterning technology (DPT). Unlike the 1-D approach of DDL, DPT in some cases allows a vertex (angle) to be formed of a vertical segment and a horizontal segment on the same mask. Thus, DPT generally allows for greater reduction in overall IC layout than DDL does. DPT is a layout splitting method analogous to a two coloring problem for layout splitting in graph theory. The layout polygon and critical space are similar to the vertex and edge of the graph respectively. Two adjacent vertices connected with an edge should be assigned different colors. Only two “color types” can be assigned. Each pattern on the layer is assigned a first or second “color”; the patterns of the first color are formed by a first mask, and the patterns of the second color are formed by a second mask. A graph is 2-colorable only if it contains no odd-cycle and loop. Although DPT has advantages, it is computationally intensive.
FIGS. 1A and 1B show two examples of pattern layouts that present odd-cycle situations and are not 2-colorable. In FIGS. 1A and 1B, the line width is labeled W, the minimum space between lines is labeled S, and the center-to-center pitch between lines is labeled P. In FIG. 1A, the segments 50, 52 and 54 form a first pattern 49 with nearby additional patterns 56 and 58. There are three spatial relationships (indicated by dashed lines), which would violate DPT constraints if put in the same mask. Patterns 49 and 56 are too close to be put in the same mask, because segment 50 and pattern 56 are too close. Patterns 49 and 58 are too close to be put in the same mask because segment 54 and pattern 58 are too close. Patterns 56 and 58 are similarly too close to each other to be put in the same mask. Thus, there is no way to distribute the first pattern 49 and the two additional patterns 56 and 58 between two masks without violating a DPT constraint. In terms of graph theory, when the total number of relationships between patterns that violate the minimum spacing for a single mask is odd, an odd cycle is present, and DPT cannot be used without changing the layout.
FIG. 1B shows a similar odd cycle situation. Segments 60, 62 and 64 form a first pattern 59. The patterns 59, 70, 72, 74 and 76 have five relationships (shown by dashed lines) that violate minimum spacing constraints for being formed in the same mask as each other. Because the number of relationships violating the minimum spacing requirements is an odd number, an odd cycle is present, and DPT cannot be used without changing the layout.
If two features are so close that a high resolution exposure cannot be obtained by DDL or DPT decomposition, the pattern is said to have a “native conflict”. Such a problem can be addressed by changing the layer design, possibly at great expense. Conventional DPT aware routers may take a long run time and still not converge to a conflict-free layout.
Improved methods for automating the double exposure decomposition process are desired.